In many networking applications, such as industrial Ethernet, computing the value of the signal to noise ratio of a data link is an important issue. It is very desirable to know when a digital signal processor that recovers data in an Ethernet physical layer device is operating within its proper parameters. Changes in the signal to noise ratio could indicate a degradation in the quality of the data link. Notifying the system of potential issues in the cabling may allow network administrators to detect potential issues before they become critical and cause failure of the network.
The present invention will be described with reference to an exemplary Ethernet physical layer device. It is understood, however, that the principles of the present invention are not limited to the exemplary network embodiment described in this patent document.
The operation of a physical layer device is described in an IEEE publication entitled “IEEE Standards for Local and Metropolitan Area Networks: Media Access Control (MAC) Parameters, Physical Layer, Medium Attachment Units, and Repeater for 100 Mb/s Operation, Type 100BASE-T.” The short name of this standard is IEEE Standard 802.3. The Physical Medium Dependent (PMD) sublayer for 100BASE-TX is defined in “Fibre Distributed Data Interface (FDDI)-Token Ring Twisted Pair Physical Layer Medium Dependent (TP-PMD)” (ANSI X3.263: 1995). The TP-PMD document provides the specification for receiving signaling on the physical medium and converting it to the digital representation required by the Physical Medium Attachment (PMA) and Physical Coding (PCS) sublayers. A commonly used method of implementing the Twisted Pair PMD sublayer utilizes a Digital Signal Processor (DSP) to recover the data and clock from the physical layer signaling.
There is a need in the art for a system and method that is capable of performing a computation of the signal to noise ratio of a data link in a 100 Mb Ethernet physical layer device. In particular, there is a need in the art for a system and method that is capable of performing a real time computation of the signal to noise ratio in a digital signal processor that recovers data in an Ethernet physical layer device.
In order to better understand the advance in the art that the present invention provides, a prior art Ethernet system will first be described. FIG. 1 illustrates a block diagram 100 of a prior art Ethernet system. FIG. 1 shows the basic components of a single Ethernet capable device connected to a physical cable. The device comprises a Media Access Controller (“Ethernet MAC 120”) that is capable of sending and receiving packetized data through an Ethernet physical layer device 150 (“Ethernet PHY 150”) to a physical medium such as a Category 5 Cable (“Cat5 Cable 140”). The Ethernet MAC 120 sends and receives packetized data across the MAC Data Interface. The MAC Data Interface may be either a Media Independent Interface (“MII”) or a Reduced Media Independent Interface (“RMII”). The Ethernet MAC 120 controls the Ethernet PHY 150 and monitors its status though a Management Interface (designated “Mgmt Interface” in FIG. 1).
The Ethernet PHY 150 also requires a clock source 130. The clock source 130 comprises a twenty five megaHertz (25 MHz) clock when an MII interface is used. The clock source 130 comprises a fifty megaHertz (50 MHz) clock when an RMII interface is used. In addition, the Ethernet PHY 150 may comprise status light emitting diodes 160 (“Status LEDs 160”) in order to externally provide visible indication of the status of the Ethernet PHY 150.
The Ethernet PHY 150 is connected to the Cat5 Cable 140 through a Magnetics unit 170 and an RJ-45 Connector 180. For simplicity and clarity, the Magnetics unit 170 and the RJ-45 Connector 180 will not be shown in subsequent figures.
FIG. 2 illustrates a block diagram of a prior art Ethernet Receive Phy 150 and Receive Mac 120. The data that is received from Category 5 cable 140 is provided to a Receive (RX) Physical Media Dependent (PMD) block 200. PMD block 200 comprises analog front end 205 and digital signal processor 210. Analog front end 205 converts the analog signals from Category 5 cable 140 into a digital form and provides the digital form of the analog signals to digital signal processor 210. Digital signal processor 210 processes the digital form of the data and recovers the transmitted data and clock signals.
As described in the IEEE Standard 802.3, the data is then sequentially provided to a Physical Medium Attachment (PMA) sublayer 215, a Physical Coding Sublayer (PCS) 220, and Media Access Controller (MAC) data interface unit 225. The MAC data interface unit 225 is capable of operating either in Media Independent Interface (MII) mode or in Reduced Media Independent Interface (RMII) mode. The MAC date interface unit 225 provides the received data to the Media Access Controller 120. As indicated in FIG. 2, Media Access Controller 120 may comprise a microprocessor unit (MPU) or a central processing unit (CPU).
The Ethernet Receive Phy 150 comprises a set of management registers in Register Block 230. The management registers are used by the Media Access Controller 120 to control the Ethernet Receive Phy 150 and to monitor the status of its operation. The management interface is commonly provided through a serial management interface defined in Clause 22 of the IEEE 802.3 specification. In addition, the Ethernet Receive Phy 150 shown in FIG. 2 is capable of providing an interrupt signal to the Media Access Controller 120.
The Ethernet Receive Phy 150 is designed to work on random (or pseudo-random) data that is encoded using a three level signaling method known as MLT3 as defined in the TP-PMD specification. A prior art digital signal processor 210 comprises modules (e.g., equalizer module, automatic gain control module, base line wander module) (not shown in FIG. 2) that operate to remove artifacts that are introduced into the transmitted data stream (e.g., by the channel and transformer). A timing recovery module (not shown in FIG. 2) is then used to lock onto the received signal to recover the clock and the data. A slicer module (not shown in FIG. 2) maps the output of the digital signal processor 210 into three types of data output, representing the three levels in MLT3 signaling. The three types of data output are minus one, zero, and plus one. The three types of data output are represented by the expression {−1, 0, 1}.
The slicer is implemented such that each possible output of the digital signal processor maps to one of the three slicer data values with an associated error value. The ideal values of the digital signal processor outputs are defined to be minus twenty four, zero, and plus twenty four {−24, 0, 24} and map to the slicer outputs minus one, zero, and plus one {−1, 0, 1} respectively with a slicer error of zero.
The error value is the difference of the actual value minus the ideal value. For example, a digital signal processor data output of minus twenty (−20) would result in a slicer output of minus one (−1) and a slicer error of plus four (4). FIG. 3A shows the slicer decision and error values of the prior art based on the input value from the digital signal processor. The slicer error is restricted to a maximum value of plus or minus seven in the prior art example.
Because the nature of the data is effectively a random distribution, an assumption may be made that on average the minus one (−1) data output will appear twenty five percent (25%) of the time, the zero (0) data output will appear fifty percent of the time (50%), and the plus one data output will appear twenty five percent (25%) of the time. FIG. 3B illustrates a histogram of received data. The peak at the left centered on the minus twenty four (−24) value represents the minus one (−1) data output. The central peak centered on the zero value (0) represents the zero (0) data output. The peak at the right centered on the plus twenty four (24) value represents the plus one (1) data output.
Based on the expected distribution, if there were no noise or distortion of the received signal, the effective signal (ES) would be given by:ES=(0.25)(−24)2+(0.50)(0)2+(0.25)(24)2=288  (1)
The effective variance (EV) of a received signal (with or without noise or distortion) is given by:
                    EV        =                              [                                          Variance                ⁡                                  (                                      -                    1                                    )                                            +                              Variance                ⁡                                  (                  0                  )                                            +                              Variance                ⁡                                  (                  1                  )                                                      ]                    SymbolCount                                    (        2        )            
The Variance values in Equation (2) are the sum of the square of each error value for the associated data value. Because the data values are assumed to have a random distribution, the numerator in Equation (2) could be expressed as the sum of the error squared, independent of the data value.
The signal to noise ratio (SNR) for a received signal is calculated from the expression:
                    SNR        =                              10            ⁢                                                  ⁢                          log              10                        ⁢                          EffectiveSignal              EffectiveVariance                                =                      10            ⁢                                                  ⁢                          log              10                        ⁢                          288              EffectiveVariance                                                          (        3        )            
A prior art digital signal processor (such as digital signal processor 210) may comprise software that is capable of calculating a signal to noise ratio (SNR) for the received data by periodically polling the Ethernet Receive Phy 150. The prior art software uses an error signal from digital signal processor 210 to compute the values of effective variance and the signal to noise ratio (SNR).
One major drawback of the prior art approach is that the polling rate is much lower than the data rate. This means the polling method is very likely to miss high rate error data. The slow polling rate also results in a very long period of time to gather enough data for a statistically significant result. Therefore, the prior art polling method does not give sufficiently complete information. Another major drawback of the prior art approach is that the polling method is computationally intensive and makes extensive demands on the computing resources of the digital signal process 210.
For these reasons there is a need in the art for a system and method that is capable of performing an efficient real time computation of the signal to noise ratio of a data link in a 100 Mb Ethernet physical layer device.
Before undertaking the Detailed Description of the Invention below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like.
The term “controller” means any device, system, or part thereof that controls at least one operation. A controller may be implemented in hardware, software, firmware, or combination thereof. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely.
Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior uses, as well as to future uses, of such defined words and phrases.